Decomposing balsa-STGs (working notes)

The DFG-project 'Optacon' is concerned with the resynthesis of speed-independentcircuits using STGs (a variant of Petri nets). One main issue is to decompose a large STG specifying the desired circuit behaviour into a collection of components that can be synthesized separately and together implement the specification. This report collects a number of working notes regarding useful decomposition; it assumes acquaintance with the topic

Fairness of components in system computations

In this paper we provide a simple characterization of (weak) fairness of components as defined by Costa and Stirling. The study is carried out at system specification level by resorting to a common process description language. This paper follows and exploits similar techniques as those developed in an earlier paper -- where fairness of actions was taken into account and was contrasted to the PAFAS timed operational semantics -- but the characterization of fair executions is based on a new semantics for PAFAS; it makes use of only two copies of each basic action instead of infinitely many and allows for a simple and finite representation of fair executions by using regular expressions. The new semantics can also be understood as describing timed behaviour of systems with upper time bounds. The paper discusses in detail how this new semantics differs from the old one, and why theses changes are necessary to properly capture fairness of components

Concurrent implementation of asynchronous transition systems

The synthesis problem is to decide for a deterministic transition system whether a Petri net with an isomorphic reachability graph exists and in case to find such a net (which must have the arc-labels of the transition system as transitions). In this paper, we weaken isomorphism to some form of bisimilarity that also takes concurrency into account and we consider safe nets that may have additional internal transitions. To speak of concurrency, the transition system is enriched by an independence relation to an asynchronous transition system. Given an arbitrary asynchronous transition system, we construct an ST-bisimilar net. We show how to decide effectively whether there exists a bisimilar net without internal transitions, in which case we can also find a history-preserving bisimilar net without internal transitions. Finally, we present a construction that inserts a new internal event into an asynchronous transition system such that the result is history-preserving bisimilar; this construction can help to find a history-preserving bisimilar net (with internal transitions)

Partial S-invariants for the verification of infinite systems families

We introduce partial S-invariants of Petri nets, which can help to determine invariants and to prove safety if large nets are built from smaller ones using parallel composition with synchronous communication. We show how partial S-invariants can support compositional reduction and, in particular, a specific form of it called the fixed-point approach. With the latter, infinite parameterized families of concurrent systems can be verified. Partial S-invariants and the fixed-point approach are used to prove the correctness of two solutions to the MUTEX-problem based on token rings; for this, we only have to prove liveness of a simplified version due to previous results

Efficiency of asynchronous systems that communicate asynchronously

A parallel composition is introduced that combines nets (regarded as system components) by merging so-called interface places; the novel feature is a flexible typing of these places, which formulates assumptions a component makes about its environment. Based on a testing scenario, a faster-than relation is defined and shown to support modular construction, since it is a precongruence for parallel composition, hiding and renaming. The faster-than relation is characterized without reference to tests, and this characterization is used to compare the temporal efficiency of some examples

Partial order semantics and read arcs

We study a new partial order semantics of Petri nets with read arcs, where read arcs model reading without consuming, which is often more adequate than the destructive-read-and-rewrite modelled in ordinary nets. As basic observations we take ST-traces, which are sequences of transition starts and ends. We define processes of our nets and derive two partial orders modelling causality and start precedence. These partial orders are related to observations and system states just as in the ordinary approach the single partial order of a process is related to firing sequences and reachable markings. Our approach also supports a new view of concurrency as captured by steps

Measuring the performance of asynchronous systems with PAFAS

Based on PAFAS (Process Algebra for Faster Asynchronous Systems), a testing-based faster-than relation has been developed that compares asynchronous systems according to their worst-case efficiency. While the testing definition is qualitative, we point out that it can also be seen as considering quantitative performance measures. Then we adapt the PAFAS-approach to a setting, where user behaviour is known to belong to a very specific, but often occurring class of request-response behaviours, and show how to determine an asymptotic performance measure for finite-state processes. We discuss a number of examples showing the usefulness of this setting and demonstrating the effect of asynchronicity on the performance measure

Component refinement and CSC solving for STG decomposition

STGs give a formalism for the description of asynchronous circuits based on Petri nets. To overcome the state explosion problem one may encounter during circuit synthesis, a nondeterministic algorithm for decomposing STGs was suggested by Chu and improved by one of the present authors. In this paper it is studied how CSC solving (which is essential for circuit synthesis) can be combined with decomposition. For this purpose the correctness definition for decomposition is enhanced with internal signals and it is shown that speed-independent CSC solving preserves correctness. The latter uses a more general result about correctness of top-down decomposition. Furthermore, we apply our definition to give the first correctness proof for the decomposition method of Carmona and Cortadella

Bisimulation on speed: lower time bounds

More than a decade ago, Moller and Tofts published their seminal work on relating processes that are annotated with lower time bounds, with respect to speed. Their paper has left open many questions concerning the semantic theory for their suggested bisimulation-based faster-than preorder, the MT-preorder, which have not been addressed since. The encountered difficulties concern a general compositionality result, a complete axiom system for finite processes, and a convincing intuitive justification of the MT-preorder. This paper solves these difficulties by developing and employing novel tools for reasoning in discrete-time process algebra, in particular a general commutation lemma relating the sequencing of action and clock transitions. Most importantly, it is proved that the MT-preorder is fully-abstract with respect to a natural amortized preorder that uses a simple bookkeeping mechanism for deciding whether one process is faster than another. Together these results reveal the intuitive roots of the MT-preorder as a faster-than relation, while testifying to its semantic elegance. This lifts some of the barriers that have so far hampered progress in semantic theories for comparing the speed of processes

Interface automata with error states

De Alfaro and Henzinger advocated interface automata to model and study behavioural types, which describe communication patterns of systems while abstracting e.g. from data. They come with a specific parallel composition: if, in some state, one component tries to make an output, which the other one cannot receive, the state is regarded as an error. Error states are removed along with some states leading to them. As refinement relation an alternating simulation is introduced. In this report, we study to what degree this refinement relation is justified by the desires to avoid error states and to support modular refinement. For this, we leave the error states in place and mark them as such instead of removing them in the composition. Our Error-I-O-Transition systems are slightly more general than Interface automata, which are restricted to input determinism. Our basic requirement is: an implementation must be error free, if the specification is. For two different notions of error freeness, we determine the coarsest precongruences contained in the respective basic refinement relations. We characterize these best refinement relations meeting our desirables with trace sets. Thus our precongruences are less discriminating than simulation-based ones. Along the way we point out an error in an early paper by de Alfaro and Henzinger